Nexperia 74HC574PW,118 1 Flip Flop IC 74HC, 3 State, 20-Pin TSSOP
- RS Stock No.:
- 170-5409
- Mfr. Part No.:
- 74HC574PW,118
- Brand:
- Nexperia
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Units | Per unit | Per Pack* |
|---|---|---|
| 50 - 600 | $0.568 | $28.40 |
| 650 - 1200 | $0.553 | $27.65 |
| 1250 + | $0.545 | $27.25 |
*price indicative
- RS Stock No.:
- 170-5409
- Mfr. Part No.:
- 74HC574PW,118
- Brand:
- Nexperia
Specifications
Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Nexperia | |
| Logic Family | 74HC | |
| Product Type | Flip Flop IC | |
| Input Type | CMOS | |
| Output Type | 3 State | |
| Clock Frequency | 24MHz | |
| Polarity | Non-Inverting | |
| Mount Type | Surface | |
| Minimum Supply Voltage | 2V | |
| Package Type | TSSOP | |
| Maximum Supply Voltage | 6V | |
| Pin Count | 20 | |
| Flip-Flop Type | D Flip-Flop | |
| Trigger Type | Positive Edge | |
| Minimum Operating Temperature | -40°C | |
| Maximum Propagation Delay Time @ CL | 38ns | |
| Number of Elements per Chip | 1 | |
| Maximum Operating Temperature | 125°C | |
| Standards/Approvals | No | |
| Length | 6.6mm | |
| Height | 0.95mm | |
| Automotive Standard | No | |
| Select all | ||
|---|---|---|
Brand Nexperia | ||
Logic Family 74HC | ||
Product Type Flip Flop IC | ||
Input Type CMOS | ||
Output Type 3 State | ||
Clock Frequency 24MHz | ||
Polarity Non-Inverting | ||
Mount Type Surface | ||
Minimum Supply Voltage 2V | ||
Package Type TSSOP | ||
Maximum Supply Voltage 6V | ||
Pin Count 20 | ||
Flip-Flop Type D Flip-Flop | ||
Trigger Type Positive Edge | ||
Minimum Operating Temperature -40°C | ||
Maximum Propagation Delay Time @ CL 38ns | ||
Number of Elements per Chip 1 | ||
Maximum Operating Temperature 125°C | ||
Standards/Approvals No | ||
Length 6.6mm | ||
Height 0.95mm | ||
Automotive Standard No | ||
The 74HC574: 74HCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops.
Mixed 5 V and 3.3 V applications
Improved signal integrity with integrated termination resistors
High noise immunity
Flow through pin out for easy layout
Wide supply voltage range
Low propagation delay
Overvoltage tolerant input options
Integrated source termination resistor options
Bus hold options
Frequency division
Controlled delays
Interface between asynchronous and synchronous systems
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