Infineon Evaluation Kit ARM Cortex Evaluation Kit KITPSE84EVALTOBO1

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RS Stock No.:
762-862
Mfr. Part No.:
KITPSE84EVALTOBO1
Brand:
Infineon
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Brand

Infineon

Product Type

Evaluation Kit

Kit Classification

Evaluation Kit

Kit Name

Evaluation Kit

Technology

ARM Cortex

Device Core

ARM Cortex M33, ARM Cortex M55

Processor Family Name

Cortex

Processor Type

PSoC

Infineon Evaluation Kit, ARM Cortex Technology, PSoC Processor Type - KITPSE84EVALTOBO1


This evaluation kit provides a development platform designed for ARM Cortex-based embedded projects. Supplied by Infineon, it supports Cortex-class PSoC devices and is intended to facilitate software and hardware exploration using modern ARM cores. The kit is appropriate for engineers assessing processing options and developing prototypes that leverage ARM Cortex M33 and M55 technologies within the PSoC family.

Features and Benefits:


• Supports ARM Cortex M33 core for secure processing capabilities
• Includes ARM Cortex M55 core for embedded AI workloads
• PSoC architecture enabling flexible peripheral configuration
• Designed for hands-on evaluation of processor family behaviour
• Compatible with Infineon development workflows and toolchains

Applications


• Suitable for secure MCU evaluation and firmware validation
• Ideal for embedded AI inference research using M55
• Used for prototyping mixed-signal peripheral integration
• Can be used for comparative performance testing of Cortex cores
• Practical for software porting between Cortex M33 and M55

Which processor cores are available on the kit?


It contains ARM Cortex M33 and ARM Cortex M55 cores to allow exploration of both secure-control and AI-oriented processing within the same PSoC family.

What technology family does the hardware belong to?


The hardware is part of the PSoC device family, combining programmable system-on-chip features with ARM Cortex processing elements.

What is the primary purpose of the board?


It is intended for evaluation and development, enabling engineers to test firmware, peripheral configuration and performance across Cortex M33 and M55 implementations.

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